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NXP Semiconductors /QN908XC /WDT /CTRL

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Interpret as CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INTEN)INTEN 0 (RESEN)RESEN

Description

watch dog control register

Fields

INTEN

Enable the interrupt event WDOGINT. Set HIGH to enable the counter and the interrupt and set LOW to disable the counter and interrupt. Reloads the counter from the value in WDOGLOAD when the interrupt is enabled, and was previously disabled.
RESEN

Enable watchdog reset output WDOGRES. Acts as a mask for the reset output. Set HIGH to enablethe reset and LOW to disable the reset.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data